Communication interface chip UART485/232

This single driver is suitable for high-speed interconnects using low-voltage differential signaling (LVDS) technology. The driver level translates LVTTL signals to LVDS levels with a typical differential output swing of 350 mV, providing low EMI and ultra-low power consumption even at high frequencies. This device is suitable for high-speed transmission of clock or data. The FIN1001 can be paired with its companion receiver FIN1002 or any other LVDS receiver.

Multidrop LVDS Quad Differential Line Driver 16-SOIC -40 to 85

Octal LVDS Driver 38-TSSOP 0 to 70

2.5/5.0/8.0Gbps 4-lane PCI Express Redriver with equalization and de-emphasis 54-WQFN -40 to 85